The optimization of Printed Circuit Board (PCB) schematics is essential for high-quality electronic devices by adding components like pull-up resistors or decoupling capacitors.
Manual optimizations are time-consuming and often neglected due to a shortage of skilled engineers, leading to higher costs for troubleshooting and increased electronic waste.
An automated approach using Graph Neural Networks (GNNs) for adding components to PCB schematics is introduced in this study to improve circuit robustness and reliability.
The approach represents PCB schematics as bipartite graphs and employs a node pair prediction model based on GNNs.
The research applies this method to three crucial PCB design optimization tasks and evaluates various GNN architectures' performance using real-world datasets labeled by experts.
The study demonstrates that GNNs can effectively address these optimization tasks with high accuracy, potentially automating PCB design optimizations in a time- and cost-efficient manner.