<ul><li>Circuit discovery has gained importance for interpretability in research, with a focus on circuit completeness to avoid inconsistencies and omissions.</li><li>Incomplete circuits are due to the presence of OR gates, which may not be fully detected by standard methods, leading to variations across runs.</li><li>A new approach introduces AND, OR, and ADDER gates to systematically analyze circuits, ensuring faithfulness and completeness by defining minimum requirements.</li><li>A proposed framework combines noising- and denoising-based interventions to enhance circuit discovery methods, accurately identifying logic gates and their contributions in language models.</li></ul>

Rethinking Circuit Completeness in Language Models: AND, OR, and ADDER Gates

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